Intel Corporation introduce Programmable processor

The researchers of Intel Corporation developed a programmable processor which delivers computer-like the execution of simple, piece of 80 cores not much larger than the size of a nail of finger, while using some less electricity than several of domestic machines of today. It is the innovating result of Intel Tera-measure the search for calculation aimed providing Teraflops or trillions calculations by the second execution for GCV of future and waiters.

Technical details of the piece of research of Teraflops will be presented at the annual conference with semiconductors integrated of circuits (ISSCC) this week in San Francisco. Tera-to measure the execution and the capacity to move the Terabyte of the data will play a pivotal part in future computers with the omnipresent access to the Internet by actuating new requests for education and collaboration as well as to allow the rise in entertainment high definition on GCV, waiters and devices held in the hand. For example, the artificial intelligence, the instantaneous visual communications, the photo-realistic plays, the exploitation of data of multi-media and the voice recognition in real times once considered as science fiction hold the first role inside exposures of voyage could become realities day labourers. Intel does not have any plan to bring this exact piece designed with cores of floating point for launching on the market.

However, Intel Tera-measure research is instrumental by studying new innovations in the individual or the specialized processor or the core functions, the types of interpuces and piece-with-computer connects together necessary to move data and in a paramount way how the software will have to be conceived to increase multiple cores of processor. This specific perspicacities offered of research of Teraflops per piece in new methodologies of silicon design, high-width of band connects together and the management of energy approaches. The researchers of Intel carried out a principal important stage with regard to leading the execution of calculation multinucléaire and parallel ahead. According to Intel, it immediate shows the way to the future when the Teraflops-able designs are banal and reorganize what can be envisaged computers and Internet at the house and in the office. The first time that the execution of Teraflops was carried out took place in 1996, on the red giant computer of ASCI built by Intel for the laboratory of national of Sandia.

The red giant computer took more than 2.000 square feet (186 square meters), were actuated by almost 10.000 pro processors of Pentium and soups more than 500 kilowatts of electricity. The piece of research of Intel carries out this same execution on a piece multinucléaire. Moreover remarkable is that this piece of research of 80 cores carries out teraflops of execution while consuming only 62 Watts less than much of processors to a core today. The piece comprises an innovating design of tile in which smaller cores are folded up like tiles, facilitating it to design a piece with many cores. With the discovery of Intel the new ones and robust materials not to establish future transistors and any immediate end in sight for the law of Moore, this extends a way to manufacture the processors multinucléaires with billion transistors more effectively in the future. The piece of Teraflops also comprises has mesh-like the architecture of network-on-a-piece which allows superb-high communications of bandwidth between the cores and is able to move Terabits of the data a second inside the piece. The also studied methods of research to actuate cores moving and stop independently, thus only those necessary to achieve one to charge are employed providing of this fact more energy effectiveness. Other Tera-to measure research will concentrate on the addition of the piled up memory with three dimensions with the piece as by developing more sophisticated prototypes of research with many cores architecture-based by Intel of universal use.

Today, Intel Tera-measure the research programme of calculation has more than 100 design projects in progress which explore the other architectural one, of software and of system defies. Intel presents eight other papers at ISSCC including/understanding one which will cover the microphone-architecture of core of Intel and its use in the processors duels and of quadruple of spanning core of the portable computers with the GCV of office computer and the waiters by using 65nm and technologies of the revolutionary transformation 45nm. Other papers cover such matters for which a piece of receiving transmitter of reader of the identification of radio frequency (RFID), a hiding-place of low power for mobile applications and a reconfigurable accelerator of Viterbi in addition to the circuits of novel on-die the suppression of resonance of provisioning, the measurement of phase-noise of on-piece and the techniques adaptive for variations and ageing.